Published:2009/7/15 5:34:00 Author:Jessie | From:SeekIC
Developed for applications requiring that gated oscillator must always complete its timing cycle. Circuit uses only two NAND gates and two diodes, none of which are critical as to type. With no input at A, oscillator output B is low. When A is driven high, D goes low initially and drives output B high. If input at A is removed, regenerative feedback is applied from B through diode D2 to C until normal timing cycle is finished. Then, with B low, D becomes high and keeps output B low.-L. P. Kahhan, Gated Oscillator Completes Last Cycle, EDN Magazine, Jan. 5, 1977, p 43.
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