Published:2009/7/25 4:53:00 Author:Jessie | From:SeekIC
Figures 9-13 and 9-14 show two typical buffering circuits for the ADCs. Three basic ranges of input signal levels can occur when ADCs are interfaces to the real world. These are as follows: (1) signals that exceed VCC or go below ground; (2) signals with input ranges less than VCC and ground, but are different from the reference range; and (3) signals that have an input range equal to the reference range. Each of these situations requires different buffering. In the last case (in which the signals are equal to the reference), no buffering is usually required, unless the source impedance of the input signal is very high. In this case, a buffer can be added between the multiplexer output and comparator input (Fig. 9-13). An op amp with high input impedance and low output impedance reduces input leakage (when one views the configuration from the multiplexer). If the input signal is within the supply range, but different from the reference range (or when the reference cannot be manipulated to conform to the full input range), the unity-gain buffer of Fig. 9-13 can be replaced with another op amp (as shown in the inset of Fig. 9-13). This type of amplifier provides gain or offset control to produce a full-scale range equal to the reference. When the input range exceeds VCC or goes below ground, the input signals must be level-shifted before the input can go to the multiplexer. There is a limit to such level shifting when the input voltage range is with 5 V, but outside the 0.5-V supply range. In this case, the supply for the entire chip can be shifted to the input range, and the digital-output signals can be level-shifted to the system 5-V supply. A typical example of level-shifting and buffering is the situation in which the bipolar inputs range from -2.5 V to +2.5 V. If the ADCs have the supply and reference provided (as shown in Fig. 9-14), then the ±2.5-V logic outputs can be shifted to 0-V and 5-V SEMICONDUCTOR, APPLICATION NOTE 258, 1994, P. 599.
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