DUAL_OUTPUT_REGULATOR

Published:2009/6/24 5:14:00 Author:May | From:SeekIC

If load can go to zero, an optional preload of 1 to 5 kΩ can be used to improve regulation. Many modern circuit designs still need a dual polarity supply. Communication and data acquisition are typical areas where both 5 V and －5 V are needed for some of the IC chips.The current mode architecture and saturating switch design allow the LT1376 to deliver up to 1.5-A load current from the 8-pin SO package. L1 is a 10-μH surface-mount inductor from Coiltronics. The second winding is used to create a negative-output SEPIC (Single-Ended Primary Inductance Converter) topoLogy using D3, C4, C5, and the second half of F1. This converter takes advantage of the fact that the switching signal driving L1 as a positive buck converter is already the correct amplitude for driving a －5-V SEPIC converter. During switch-off time, the voltage across L is equal to the 5-V output plus the forward voltage of D1. An identical voltage is generated in the sec-ond winding, which is connected to generate －5 V using D3 and C5. Without C4, this would be a simple flyback winding connection with modest regulation. The addition of C4 creates the SEPIC topology. Note that the voltages swing at both ends of C4 is theoretically identical-even without the capacitor. The undotted end of both windings goes to a zero ac voltage node, so the equal windings will have equal voltages at the opposing ends. Unfortunately, coupling between windings is never perfect, and load regulation at the negative output suffers as a result. The addition of C4 forces the wind-ing potentials to be equal and



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