Published:2009/6/19 3:09:00 Author:May | From:SeekIC
As this schematic shows,the ADXL50 accelerometer,U2,interfaces with an A/D converter,U3, to drive a 3 1/2-digit LCD module, DISPl. Because that module displays any number from -19.99 to +19.99, the circuit is designed to measure g's within that range. The heart of the circuit is U2, the ADXL50 ac-celerometer. The sensitivity of that chip is set to ±20 g's in order to accommodate the full scale capa-bility of LCD module DISP1 (19.99). Circuit gain is determined by the values of R4, R5, and R6, potentiometer R2, and R3 provides a way to manually set the zero-g voltage-output level at pin 9 of U2 to half the supply voltage-2.5V. That output voltage will vary linearly by 0.1-V/g of acceleration.In order to achieve go,od circuit performance at low g levels, the bandwidth of the amplifier is limited to about 30 Hz by C6. The digital-display section of the circuit is composed of DISP1 and U3. Included in U3 are the A/D converter, clock oscillator, storage resistors and latches, 3)6-digit seven-segment decoders, and backplane generator.The differential analog input of U3 is applied between pins 30 and 31. The positive input, pin 31, is driven by output-pin 9 of U2 through R8, a buffer resistor, and the negative input, pin 30, is biased at a fixed voltage of 2.5 V by a voltage-divider string composed of R9 and RIO.A reference voltage is required by U3. Full-scale display, 19.99, occurs when the differential, ana-log input voltage applied between pins 31 and 30 is equal to twice the reference voltage. The decimal point ofthe LCD has to be illuminated to display readings from 0.00 to 19.99. That is done by invert-ing the backplane square-wave drive signal appearing at pin 21 of U3, through MOSFET Q1, and ap-plying the 180-degree out-of-phase signal to pin 12 of DISP1.
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