Published:2009/7/14 23:29:00 Author:Jessie | From:SeekIC
In the circuit diagram shown, a digital-to-analog converter (DAC) IC is used to create an envelope waveform, the attack and decay of which are controllable. Typical applications can include audio and music synthesizer circuitry. Its operation is as follows. IC1a and IC1b form two variable-frequency oscillators, whose outputs are fed to IC2. This is configured as a demultiplexer, addressed by a signal appearing on pin 11. The signal from IC1a or IC1b appears at the output, pin 3. Initially pin 11 of IC2 will be high, so IC1a will be selected and fed through resistor R1 to IC4, a bi-nary counter, which is cascaded to 106. In total, this results in an 8-bit binary count (0 to 255) appearing at the counters' outputs. The speed of the count is adjustable with VR1. The counter output is fed directly to IC3, a ZN429E digital-to-analog converter. The ramp voltage appears at pin 4 of IC3, and will always be between 0 and 4 V. When the counter reaches its terminal count of 255, pin 7 of IC6 (CARRY OUT) will go low. This signal is inverted by IC1c and used as a clock pulse to IC5, a 4013 D-type flip-flop. The output at pin 1 of IC5 now goes low, so that a logic 0 is placed on pin 11 of IC2 and on pin 10 (UP/DOWN) of both counter ICs. Oscillator IC1b is now fed through the dernultiplexer to the counters, which now count down from 255. The output voltage from IC3 will now fall at a rate determined by the setting of VR2. As the count passes zero and rolls back to 255, a pulse again appears at pin 7 of IC6, and the cycle continues. At any time, switch S1 (debounced by CB and R3) can be momentarily activated. This causes a high output at pin 13 of IC5, which drives transistor TR1, shunting the clock signal to the counters. This will freeze the count at that point. A second operation of S1 restarts the count from where it left off. A buffer/amplifier formed by IC8a (one half of an LM358N) allows the output voltage of the DAC (IC3) to be increased or the dc level shifted.
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