Published:2009/7/13 4:18:00 Author:May | From:SeekIC
Developed for use with bidirectional counter circuits to avoid counting errors when up and down pulses occur simultaneously. Operation is based on knowing maximum frequency of separate data pulses. Outputs 1 and 2 will be separated by at least one clock period even if inputs D1 and D2 occur simultaneously. Article gives operating details. -J. H. Burkhardt, Jr., Anti-Coincidence Circuit Prevents Loss of Data, EDN|EEE Magazine, Jan. 1, 1972, p 73.
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