Published:2009/7/7 20:15:00 Author:May | From:SeekIC
Two-level multiplexing system increases effective switching speeds when transmitting 64 analog signals on single transmission line. Four clock phases are generated with DM7473 2-bit counter that toggles on high-to-low dock edge. DM7400 NAND gates decode flip-flop outputs into required four clock phases. As clock phase goes from low tohigh state, DGt181 analog switch fed by it turns off and corresponding DM7493 4-bit binary counter is triggered to next address state for sampling of that input channel at output. Reset is used to set system for starting on first channel when power is applied.- Analog Switches and Their Applications, Siliconix, Santa Clara, CA, 1976, p 7-11-7-13.
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