30s timing circuit formed by PUT

Published:2011/8/2 10:11:00 Author:Nancy | Keyword: 30s timing circuit, PUT | From:SeekIC

If you add a set pulse between the cathode-anode of PUT1, then PUT conducts, the + 5 V power supply charges C1 through it, the voltage of C1, which is the anode voltage of PUT2, increases gradually. When the anode voltage is higher than the gate bias voltage, PUT2 conducts, the discharging current of C1 flows through the drive transistor VT1 to make it saturate and conduct, the output Uo is close to OV. The C1 voltage add a reverse bias to PUT1, PUT1 cuts off to make the circuit reset. The output pulse width is basically decided by the C2 and R1, the pulse width is about 10 us. The delay time of the output pulse is decided by the R2, R3, R4 and C1.



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