1_HR_TIME_DELAY

Published:2009/7/15 2:42:00 Author:Jessie | From:SeekIC

Achieved by periodically sampling voltage on timing capacitor, using sampling pulse generated by 2-cps ujt relaxation oscillator. Between samples, timing capacitor is isolated from emitter of ujt by low-leakage planar silicon diodes.- Transistor Manual, Seventh Edition, General Electric Co. 1964, p 321.



Reprinted Url Of This Article:
http://www.seekic.com/circuit_diagram/Basic_Circuit/1_HR_TIME_DELAY.html

Print this Page | Comments | Reading(3)