Published:2009/7/2 20:53:00 Author:May | From:SeekIC
Designed to take single-event positive-going TTL pulse, occurring only once when series of logic conditions is met, and recreating pulse accurately on CRO as square wave in which half of cycle represents original pulse width. FF-A and 9316 binary counters are initially eleared. Input pulse of interest gates delay-line osciliator (lower left) on for duration of pulse width. During this time, binary representation of pulse width is accumulated in 9316 counters, then stored in 9314 D-latches. At same time, final 9324 comparator IC1 is enabled and oscillator is gated on again to reset 9316s and toggle FF-C. Square-wave output of FF-C then represents original pulse width within 35 ns (one clock).-N, L. White, Don't Miss That Single Event Pulse-Store it, EDN Magazine, Sept. 20, 1975, p 70 and 72.
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