Published:2009/7/23 20:06:00 Author:Jessie | From:SeekIC
With the values shown, this circuit has a ±0.025°C accuracy over 0° to 100°C. The input offset voltage of the LT-1001, and its drift with temperature, are permanently trimmed at wafer test to a low level. However, if further adjustment of VOS is necessary, nulling with the circuit of Fig. 10-4B will not degrade drift with temperature. The Fig. 10-4B offset circuit has an approximate null range of ±100 μV. o Raytheon U near Integrated a rcuts 1989, p. 4-45.
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