INFINITE_SAMPLE_AND_HOLD_AMPLIFIER

Published:2009/7/6 21:12:00 Author:May | From:SeekIC

Circuit NotesDuring normal hold mode, the replicated analog voltage is buffered straight through the S/H amplifier to the output. Upon issuance of a SAMPLE signal, the SiH amplifier is placed in the hold mode, holding the voltage until the new analog voltage is valid. The same SAMPLE signal triggers an update to the input sample-and-hold amplifier. The most current analog voltage is captured and held for conversion. The previously deter-mined voltage is held stable at the output during the conversion cycle while the SAR/D-to-A converter continuously adjusts to replicate the new input voltage. At the end of the conversion, the output sample-and-hold amplifier is once again placed in the track mode. The new analog voltage is then regenerated.



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