Published:2009/7/9 2:06:00 Author:May | From:SeekIC
In this circuit, a 2-MHz clock is divided by eight ht U1, providing a stable 250-kHz carrier. Q1 and Q2 buffer the clock and provide a low-impedance drive for op amp U4, which is a high-gain amplifier and integrator. U4 accepts audio inputs and converts the 250-kHz square wave into a triangular wave. The summed audio and triangular-wave signal is applied to the input of comparator U7, where it is compared with a dc reference to produce a pulse-width modulated signal at the output of U7.The output devices switch between the + 50 V and -50 V rails in a complementary fashion, driving the output filter that is a sixth-order Butterworth low-pass type, which demodulates the audio and attenuates the carrier and high frequency components.Feedback is provided Rf; amplifier gain is RfRi.
Specifications: 200 W continuous power into a 4-Ω load; 20 to 20 kHz frequency response +0.5, -1.0 dB at 200 W; TED, IMD 0.5% at 200 W; 1.5-V rms input for rated output; 69 dB S/N ratio, A weighting; 6.6-V ms slew rate.
Reprinted Url Of This Article:
http://www.seekic.com/circuit_diagram/Amplifier_Circuit/CLASS_D_POWER_AMPLIFIER.html
Print this Page | Comments | Reading(3)
Code: