Published:2009/7/9 22:48:00 Author:May | From:SeekIC
The design incorporates 30-Ω,1/4λmicrostrip lines on the input and output.C3,C4,C7,and C8,along with L1, from a pi network that matches the low-input impedance ofthe device to 50 Ω.C5,C6,C9,C10,and 30-Ω transmission line L2 form an outputpl network that maxlmlzes power transfer to 50 Ω.C10 is not always necessary, depending on variations among devices and circuitboard material.Bias is provided by R1,R2,and D1.R1 can be optimized, if desired,to adjust the collector idling current.
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