Published:2009/7/23 22:59:00 Author:Jessie | From:SeekIC
This circuit uses an MRF174 TMOS FET, has a typical gain of 12 dB, and can survive operation into a 30:1 VSWR load at any phase angle with no damage. Notice that the output power can be reduced to loss than 1W continuously by driving the dc gate voltage negative (by adjusting R3). Figure 2-53B shows this performance feature.
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