Published:2013/10/13 20:39:00 Author:lynne | Keyword: Quirky 555 Timer Reset Function | From:SeekIC
How many have had legitimate problems with the 555 timer? Let me guess…it involved the reset line, did it not? We all know that pin 4 must be set high before oscillation begins, but what is its threshold? input current? and what happens when it is operated slightly out of spec? This may be the very first attempt in documentation of this obscure phenomenon.
555 pin 4 reset behavior schematic
Method
To determine reset threshold, a transistor integrator generates a low impedance, negative-going ramp voltage signal that integrates from +5V to –0.65V. To obtain the negative voltage, the power supply is split to provide –0.7V. While it is slowly changing at the rate of -1V /S (trace 1), pins 2 & 6 are monitored for oscillation (trace 2). A 3rd trace monitors the output (pin 3). All data is logged on the spreadsheet.
A total of (8) devices were tested, including (2) CMOS TLC555N devices.When running, the 555 oscillates at approx. 100hZ. Vcc = 5V.
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