Samsung to unveil the 20-nm logic process

Published:2011/9/22 0:51:00 Author:Phyllis From:SeekIC

Early this year, Samsung’s foundry operation announced that the company was getting ready to run 20nm test-chip shuttles for its customers starting from the second half of this year. Now Researchers from Samsung Electronics are set to unveil the company’s upcoming 20-nm logic process at the International Electron Devices Meeting (IEDM), which will take place in Washington DC from December 5 to 7, 2011. This marks it is becoming one of the first semiconductor manufacturers to use this new fabrication node.

Samsung researchers are set to report on device structures operating at 0.9V with drive currents of 770-microamp per micron for the n-type FET and 756-microamps per micron for the p-type FET. A six-transistor SRAM bit cell is among the structures built using the process and Samsung is expected to report a static noise margin of 250mV at the operating voltage of 0.9V.

Other companies like IBM, GlobalFoundries also have announced to turn to gate-last technology to start with the 20 nm node. Samsung is the most eager one to switch to this manufacturing process.

The point about this technology lies in the timing when the metal electrode is deposited, before or after the high temperature activation anneal(s) of the flow, gate-first, at least in theory, allowing customers to transition to a lower manufacturing node without having to redesign their chips.

The process technology is based on a planar bulk CMOS process with gate-last high-K metal gate that does not include FinFETs, where the material around the transistor is etched away to leave the transistor in a fin-like structure. And it will be manufacturable with 193nm immersion optical lithography on a limited minimum pitch.

The 20-nm technology will be a full node shrink from 28-nm, enabling the approximate 50 percent area scaling that the industry has come to expect with each technology generation. It is predicted that the new manufacturing node will provide a 30 percent improvement in performance over present day 28nm technology at the same standby current.

The chips built using the 20nm fabrication process will be used in various devices, including smartphones, tablets and other portable consumer electronics as well as in IT communications infrastructure equipment.

Samsung is the world’s second largest semiconductor manufacturer and is surpassed only by Intel. The company has only recently entered the foundry market where it has to compete with TSMC, which controls about 50% of the industry, as well as with other smaller players.

The attributes of the planar 20-nm process and how quickly Samsung can roll it out are keys to determining how much of a manufacturing lead Intel has offer the rest of the industry.

Reprinted Url Of This Article: http://www.seekic.com/blog/Appliance/2011/09/22/Samsung_to_unveil_the_20_nm_logic_process.html

Print this Page | Comments | Reading(9394)