The MIC Architecture Systems

Published:2011/6/21 2:02:00 Author:Phyllis From:SeekIC

At the International Supercomputer Conference held this week, six OEMs will show systems that running a standard version of Intel’s Many Integrated Core architecture (MIC). Intel will also report progress which programming the highly parallel coprocessor eared for high performance computing clusters.

Companies like Colfax, Dell, Hewlett-Packard, IBM, SGI and Supermicro will show these systems. At least one research organization will share its experiences porting applications to the architecture using about 32 cores on a MIC chip. The current chip is named Knights Ferry and is not designed for commercial purposes, to some extent, this is because it can not support double precision floating point operations. Its future version, called Knights Cornets, is made based on Intel’s 22 nm tri-gate process, and is believed to have the ability of supporting double precision, however, about the exact shipping time the company doesn’t announce yet.

The current MIC mainly depends on a mix of Intel proprietary programming tools and standards such as OpenMP. The Knights Corner product will also support the OpenCLAPI standard backed by its counterpart Advanced Micro Devices for its competing chips. The Knights Corner product will pack more than 50×86 cores. MIC represents Intel’s implementation of a kind of many core, graphics-based processor targeting use as a general-purpose accelerator for highly parallel applications. It will compete with AMD’s Radeon chips using OpenCL and Nvidia’s graphics chips using its proprietary CUDA environment.

So far, Nvidia has a lead in this space which supports relatively few users buying chips at generally high prices and profit margins. For example, 19 of the Top 500 supercomputers in the latest rankings that use graphics accelerators, 12 of them use Nvidia chips.

Intel claims it will have an advantage in this space because its MIC chips will use x86 cores. Users will be able to program them more easily than competing GPUs because they will use existing x86 server programming tools, Intel claims.

The SGI said most of its users that interested general-purpose graphics accelerators are interested in the relative ease of programming promised by the MIC architecture. However, the company sees a range of performance characteristics across different applications with the current MIC chips. The performance range of MIC is dramatically based on applications from orders of magnitude improvements to incremental improvements using the current chips that support only single-precision floating point operations.

The MIC architecture promises to help supercomputer makers deliver exascale-class systems by about 2018. This is a target for which many people are aiming. Today’s fastest system is approaching 10 petaflops without the use of accelerators. Intel’s road map for MIC promises even higher core counts in the future. The related integrated circuit is MG131A.

Reprinted Url Of This Article: http://www.seekic.com/blog/Appliance/2011/06/21/The_MIC_Architecture_Systems.html

Print this Page | Comments | Reading(288)